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Isaac Chuang and Extropic Map Diffusion and Z1T Transformers to Thermodynamic Hardware

Can a generative model produce structured images and tokens by letting sub-threshold transistors relax through thermal noise rather than multiplying dense floating-point matrices on a digital clock? In their joint research paper An efficient probabilistic hardware architecture for diffusion-like models (arXiv:2510.23972 / npj Unconventional Computing), Andraž Jelinčič, Owen Lockwood, Akhil Garlapati, Peter Schillinger, MIT physicist Isaac L. Chuang, Guillaume Verdon, and Trevor McCourt formalize the Denoising Thermodynamic Computer Architecture (DTCA), followed in 2026 by Extropic’s Z1T sparse transformer-like architecture co-designed for its Z1 thermodynamic sampling unit.

For the Thermodynamic Computing research hub and the broader investigation into how scientists define and measure consciousness across substrates, the Chuang and Extropic architecture answers a persistent engineering objection. Critics of probabilistic and analog hardware have long noted that while Ising machines and p-bit lattices naturally solve combinatorial optimization problems, modern generative AI relies on deep, dense neural layers that resist mapping onto sparse physical lattices. DTCA and Z1T show how generative denoising and hybrid transformer workloads can be restructured around local stochastic relaxation, while highlighting the boundary between simulated vendor efficiency projections and verified silicon performance.

How the Denoising Thermodynamic Computer Architecture (DTCA) Works

Standard diffusion models on GPUs generate data by starting from Gaussian noise and iteratively applying a large, dense neural network (such as a U-Net or Diffusion Transformer) over dozens of discrete steps. At each step, the GPU expends substantial energy suppressing thermal noise inside billions of deterministic transistors only to compute pseudo-random Gaussian numbers in software and multiply dense weight matrices.

Jelinčič, Chuang, Verdon, and McCourt invert that stack by introducing Denoising Thermodynamic Models (DTMs) mapped onto an all-transistor probabilistic circuit layout built around three core mechanisms.

  1. Chained sparse Boltzmann machines replace a single deep deterministic network with all-to-all layer connectivity, so that each denoising step corresponds to sampling from a conditional energy-based distribution $P(x_{t-1} \mid x_t)$.
  2. Sub-threshold CMOS probabilistic bits (p-bits) operate near thermal equilibrium ($k_B T$), where intrinsic Johnson-Nyquist and shot noise drive continuous-time stochastic state flips biased by local analog or low-precision digital coupling weights.
  3. Fixed sparse locality constrains physical wires on the 2D silicon die to a locally connected bipartite or grid graph, using latent auxiliary p-bits to mediate long-range correlations across relaxation sweeps without routing congestion.
Architectural Feature Conventional GPU Diffusion / LLM Extropic & MIT DTCA (DTM) Extropic Z1T Hybrid Co-Design
Elementary Unit Deterministic IEEE FP16/FP8/INT8 MAC units Sub-threshold CMOS probabilistic bits (p-bits) Hybrid digital XPUs/FPGAs + Z1 p-bit sampling cores
Role of Thermal Noise Suppressed via voltage margins and clock synchronization Harnessed directly as the Markov chain sampling engine Drives native probabilistic sampling in sparse layers
Connectivity Topology Dense all-to-all matrix multiplication via HBM transfers Fixed sparse local lattice with auxiliary latent nodes Sparse transformer-compatible blocks mapped to Z1 topology
Energy Claim & Provenance Empirical silicon baseline (hundreds of watts per GPU) ~10,000x per-sample reduction (vendor/paper simulation model) Order-of-magnitude simulated gain in disaggregated inference
Hardware Availability Commercial production XTR-0 prototype / Z1 tape-out roadmap (not independently benchmarked) Algorithmic co-design & FPGA/simulator validation

From Diffusion to Z1T Sparse Transformer Co-Design

While DTCA addressed image-like diffusion workloads, large language models and multimodal world models rely on attention and feedforward blocks that are traditionally dense. In 2026, Extropic extended the co-design methodology with Z1T, a family of sparse, transformer-like generative architectures engineered to map onto the fixed local connectivity of the Z1 chip.

In the Z1T pipeline, computation is disaggregated across two distinct physical substrates. Deterministic digital processors (such as GPUs or FPGAs in the experimental prototype) handle the dense linear projections and attention routing where high numerical precision and global routing are indispensable. The heavy generative sampling and energy-based latent transitions are offloaded to the Z1 thermodynamic sampling unit, whose cores contain hundreds of thousands of locally coupled p-bits.

Across both the DTCA paper and the Z1T disclosures, strict facts discipline is essential. The oft-cited figure of a 10,000-fold reduction in energy per generated sample comes from the authors’ circuit-level SPICE and architectural simulations comparing projected DTCA silicon against GPU baselines on targeted image benchmarks, rather than from third-party measurements on mass-produced commercial hardware. As detailed in our coverage of Guillaume Verdon, Extropic, and the $75 million CHIPS letter of intent and Extropic’s open-source THRML library, independent verification awaits broad delivery of the Z1 and Z1.5 chips. Readers looking for physical probabilistic and noise-driven boards that can be inspected and run today should consult our thermodynamic computing hardware guide, alongside Kerem Camsari’s one-million p-bit FPGA computer and Normal Computing’s CN101 thermodynamic linear algebra chip.

How Thermodynamic Sampling Bears on Consciousness Theory

Why does a hardware architecture for diffusion and sparse transformers bear on the scientific study of consciousness? In computational neuroscience and philosophy of mind, the connection runs through two explicit theoretical pillars, namely Karl Friston’s Free Energy Principle (Active Inference) and physicalist critiques of software simulation.

In Active Inference and Bayesian brain theories, perception is not a deterministic feedforward classification pass. It is continuous variational and Langevin sampling over a generative world model, where neural populations settle into low-free-energy configurations that explain sensory inputs. On a standard digital computer, simulating stochastic Langevin dynamics or Boltzmann relaxation requires stepped numerical integration over discrete clock cycles, separating the mathematical model of an energy surface from the physical thermodynamics of the silicon running it.

In a thermodynamic sampling unit like DTCA, or in coupled oscillator networks such as Artificial Kuramoto Oscillatory Neurons (AKOrN), the physical trajectory of the circuit is the relaxation down a real physical free-energy potential. For theorists who argue that genuine causal emergence or phenomenal binding depends on continuous-time physical state transitions and intrinsic thermodynamic irreversibility rather than abstract Turing table lookups, thermodynamic hardware narrows the gap between biological wetware and synthetic silicon. At the same time, nobody has demonstrated that any probabilistic chip, p-bit lattice, or Boltzmann sampler possesses subjective awareness. A physical energy potential that settles into a low-energy state solves an inference problem, while whether that physical relaxation supports experience depends on the system’s global recurrent organization and self-modeling architecture.

Comparison to The Consciousness AI

In The Consciousness AI, our Thermodynamic Computing console and substrate modules explore how thermal noise, stochastic resonance, and energy-based relaxation shape emergent network dynamics. It is mandatory to state clearly that The Consciousness AI runs all p-bit, Ising, and Kuramoto relaxation schemes strictly in software emulation, with no physical thermodynamic ASIC in our loop.

The architectural insights from Chuang, Verdon, and McCourt’s DTCA and Z1T work directly inform how we structure hybrid simulations. Specifically, Z1T’s disaggregation between deterministic routing layers and sparse, locally coupled stochastic sampling blocks mirrors how biological brains combine long-range myelinated white-matter tracts with dense, noisy local cortical microcircuits.

Open Engineering Hurdles

Before thermodynamic coprocessors can rival GPU clusters in general AI workloads, three hardware challenges must be solved in foundry silicon. First, device-to-device transistor mismatch in sub-threshold CMOS requires fast, low-overhead on-chip calibration so that manufacturing variance does not warp the target probability distribution. Second, data movement between digital host accelerators and thermodynamic sampling units can bottleneck overall system energy if PCIe or die-to-die SerDes interfaces consume more power than the p-bit cores save. Third, training sparse multi-layer energy-based models at the scale of frontier foundation models remains algorithmically harder than standard backpropagation through dense transformers.

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